Design Verification

Job description
Role: Design Verification

Location: Bangalore, India

Experience: 5+ Years

Notice Period: Immediate to 15 Days only



Mandatory skills: SV/UVM



THE ROLE: You will help bring to life cutting-edge designs. You will work closely with the architecture, IP/SoC design verification, firmware, post-silicon bring-up and validation teams to achieve first pass silicon success and continues production success. The Person The successful candidate will assume technical responsibilities and hands-on technical architect role responsible for providing complex design methodologies in the hardware design verification space. He/she is expected to excel in analytical thinking, problem solving, organizing data, gathering requirements, planning and execution. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion.



Key Responsibilities;

• Be a part of a wider team of technical experts in design verification in AMD’s Central R&D team

• Lead verification methodologies with expertise in UVM/Systemverilog based testbenches.

• Collaborate with the arch, functional DV and various design teams to understand design enhancement and verification ask

• Demonstrate and utilize strong debugging skills in SOC/IP design & verification Collaborate with EDA vendors for tool trainings, evaluation and drive EDA vendors toward common solutions across AMD

• Define and drive IP development infrastructure and methodology

• Work with development teams to bridge the gap for existing flows and assist in difficult technical debug

• Work closely with IP development teams to gather requirements and develop strategies to tackle key technical problems Preferred Experience

• Deep experience in functional verification with demonstrated expertise in CAD flows and methodology development

• Experience working seamlessly across engineering disciplines and geographies to deliver excellent results

• Proficient in scripting languages - Perl, TCL, Python, etc

• Experienced with Verilog, System Verilog, C, and C++

• Proficient understanding of of ASIC Design and verification flow - SoC/sub-system/IP level verification

• Hardware/software co-verification and validation methodologies is a plus

• Emulation and/or simulation acceleration experience is a plus



ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering