DDR Engineer System Validation Verification |4 8 yrs

Job Description :One of our IT MNC clients is scouting for DDR Engineer. At least 4 years of experience in System Verilog HVL. At least 3 years of experience in OVM UVM VMM Test Harness. At least 2 3 years of experience in working on DDRx family or HBM. Especially DDRx IP Controller verification and even working at SoC level. DDR4 5 6 is preferable. Hands on experience of developing assertion, checkers, coverage and scenario creation. Must have executed at least 1 SoC Verification project Experience in developing test and coverage plan, Verification environment and validation plan. Knowledge of at least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required. Team handling experience : size 3 or more minimum, duration 1 year minimum Define derive Scope, Estimation, Schedule and Deliverables of proposed work. Assure compatibility of resources, tools, platform Work with customers through acceptance of deliverables. Effectively manage team members through coaching and mentoring and provide guidance and career planning to team members. Ensure customer satisfaction